ABSTRACTS OF ARTICLES OF THE JOURNAL "INFORMATION TECHNOLOGIES".
No. 12. Vol. 25. 2019

DOI: 10.17587/it.25.747-756

R. A. Solovyev, Ph.D., Chief Researcher, e-mail: turbo@ippm.ru, D. V. Telpukhov, Ph.D., Head of the Department, A. G. Kustov, Engineer, T. U. Isaeva, Ph.D., Researcher, A. A. Volkov, Engineer, Institute for Design Problems in Microelectronics

Application of Modular Arithmetic Methods in the Development of Hardware Implementations of Neural Networks

The article proposes to use the methods of modular arithmetic for the implementation of neural networks at the hardware level in VLSI and FPGAs. Widely known mobile neural networks that are highly accurate and suitable for implementation in hardware are considered. The main difficulties in their implementation in the basis of modular arithmetic, namely the rounding operation and the comparison operation, are examined and analyzed. A number of methods have been proposed to solve these problems, such as using convolutions with stride greater than 1 instead of MaxPooling layers, using non-standard activations containing only addition, subtraction and multiplication operations, as well as an efficient algorithm for implementing rounding operations. Additionally, a complete route for designing and transferring a MobileNet neural network to the hardware level in a modular basis is proposed.
Keywords: neural networks, modular arithmetic, residue number system, rounding operation, hardware implementation

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