Journal "Software Engineering"
a journal on theoretical and applied science and technology
ISSN 2220-3397

Issue N2 2023 year

DOI: 10.17587/prin.14.62-68
Hardware Implementation of Digital Operational Low Power Units in FPGA
P. N. Bibilo, Head of Laboratory, bibilo@newman.bas-net.by, The United Institute of Informatics Problems of the National Academy of Sciences of Belarus, Minsk, 220012, Belarus
Corresponding author: Petr N. Bibilo, Head of Laboratory, The United Institute of Informatics Problems of the National Academy of Sciences of Belarus, Minsk, 220012, Belarus E-mail: bibilo@newman.bas-net.by
Received on December 15, 2022
Accepted on December 22, 2022

The results of experiments on hardware implementation of various VHDL models of operating devices in FPGA oriented to reducing power consumption are described. Operating devices are also called finite state machines with data paths. It is established that the VHDL model based on clock gating, which is most effective for custom VLSI, can not be implemented in FPGA. Effective models for FPGA are VHDL models based on zeroing unused operands or storing their values in additional memory registers. After conducting an experimental comparison of various methods for a specific operating device (or other digital device), the designer can choose a suitable (compromise) method of VHDL description, considering the obtained values of the parameters of power consumption, performance and hard­ware complexity. The article is a direct continuation of the previous article [1], which describes in detail the models under study and presents the results of experiments on hardware implementation of the same operating devices as part of custom CMOS VLSI

Keywords: digital device, finite state machine with datapath, digital logic synthesis, power consumption, VHDL, Vivado, FPGA
pp. 62–68
For citation:
Bibilo P. N. Hardware Implementation of Digital Operational Low Power Units in FPGA, Programmnaya Ingeneria, 2023, vol. 14, no. 2, pp. 62—68. DOI: 10.17587/prin.14.62-68 (in Russian).
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