The analysis carried out in the article shows the possibility of creating a problem-oriented VLSI, fabricated according to the technological standards of 28 nm or less, for at least one family of digital signal processing problems using similar computing nodes in structure. The use of distributed arithmetic allows one to apply a technique based on performing only those multiplication steps for which non-zero digits are set in the corresponding positions of the filter coefficients. Therefore, the performance of 200 nodes executing 2 steps at 1 GHz is equivalent to approximately 80 GMAC/s/mm2 for 16-bit coefficients. The VLSI architecture view opens up the possibility to study the effectiveness of implementing other families of tasks and refine the architectural parameters for their implementation. The proposed functionality of VLSI computing nodes allows them to be used in various fields of technology, which potentially increases the need for the release of such VLSI.